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A Fault Tolerant and Power Efficient Network-on-Chip Architecture using Quad-Function Channel (QFC) Buffers

QORE is a fault tolerant Different Network on Chip (NoCs) that seeks to reduce power consumption and improve performance of NoCs while mitigating errors caused by faults. Through a new type of data buffer and connecting multiple processing cores QORE has the ability to reduce power and avoid faults. Background: With electrical components shrinking...

Published: 4/3/2023 | Inventor(s): Avinash Kodi, Dominic Ditomaso, Ahmed Louri

Keywords(s):

Category(s): Technology Classifications > Engineering & Physical Sciences > Communications & Networking > Networking, Technology Classifications > Engineering & Physical Sciences > Electronics > Computer Hardware

Fault- and Variation-Tolerant Energy- and Area-Efficient Links for Network-on-Chips (NoCs)

Researchers in the University of Arizona's Department of Electrical and Computer Engineering developed an enhancement to the Inter-Router Dual-Function Energy and Area Efficient Links (iDEAL) design for Network-on-Chips (NoC). This development adds dynamic error correction and fault-tolerance capability to the iDEAL design scheme and overcomes many...

Published: 4/3/2023 | Inventor(s): Ahmed Louri, Janet Roveda, Avinash Kodi, Ashwini Sarathy

Keywords(s):

Category(s): Technology Classifications > Engineering & Physical Sciences, Technology Classifications > Engineering & Physical Sciences > Electronics, Technology Classifications > Engineering & Physical Sciences > Electronics > Digital Circuits, Technology Classifications > Engineering & Physical Sciences > Communications & Networking, Technology Classifications > Engineering & Physical Sciences > Communications & Networking > Networking