Invention:
This invention is a method of fabricating pillared graphene. This is accomplished by first constraining a layer of fullerenes between graphene sheets (the proto structure). Tether molecules may be employed to help chemically bind the fullerenes to the graphene at attachment points. Energy is applied to the proto structure via chemical reaction, thermal or radiative processes to break the carbon-carbon double bonds and open holes in the fullerenes and the graphene sheets at the attachment points. The fullerenes and graphene near the attachment points reorganize their carbon-carbon bonds via cycloaddition. The reactions resulting in establishment of fullerene to graphene bonds around the perimeter of the holes and reorganization of their carbon-carbon bonds to form open nanotubes that are conjoined between the pair of graphene sheets in a pillared graphene nanostructure. Energy for bond reorganization may come from either chemical reaction of the tether molecules with other chemical species present during fabrication, and/or from adsorption or scattering of energetic atom, electron or photon radiation to which the proto structure is exposed.
Background:
This invention relates to 3-D nanostructures, and more particularly to the fabrication of pillared graphene. Pillared graphene is a carbon heterostructure comprised of an oriented array of carbon nanotubes connected on each end to a sheet of graphene around the perimeter of the nanotubes.
Advantages:
- Usage of sequential sandwiched layers of fullerenes and graphene as a starting point for making pillared graphene, with same length pillars throughout the structure
- Pillared graphene structure, made as described, may exhibit thermoelectric properties superior to all existing thermoelectric materials
- The material may also be amongst the lightest, strongest, and most refractory materials available
Applications:
- May serve as a very high capacity reversible hydrogen storage media
- It may also serve as a media for next generation electronic or spintronic chip manufacturing
Status: issued U.S. patent #8,425,735
